SN74CBTLV3125 Datasheet | Texas Instruments

description /ordering information The SN74CBTLV3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is high. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING - RGY Tape and reel SN74CBTLV3125RGYR CL125 SOIC - D Tube Tape and reel SN74CBTLV3125D SN74CBTLV3125DR CBTLV3125 - 40°C to 85°C SOP - NS Tape and reel SN74CBTLV3125NSR CBTLV3125 SSOP (QSOP) - DBQ Tape and reel SN74CBTLV3125DBQR CL125 TSSOP - PW Tape and reel SN74CBTLV3125PWR CL125 TVSOP - DGV Tape and reel SN74CBTLV3125DGVR CL125 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2003, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 - POST OFFICE BOX 1443 HOUSTON, TEXAS 77251- 1443 SN74CBTLV3125 LOWĆVOLTAGE QUADRUPLE FET BUS SWITCH SCDS037J - DECEMBER...